The present invention relates to power converters, and more particularly, to a power converter that efficiently provides the required hold-up time during power line disturbance conditions.
Many electronic devices require one or more regulated DC voltages. The power for such electronic devices is ordinarily supplied by a power converter that converts an input voltage into the regulated DC voltages required by the devices. Many types of power converters can operate over a wide input voltage range. If the input voltage falls below the minimum permissible voltage and adversely affects the converter operation, the electronic devices that rely on the converter for power could experience critical failures such as the loss of data. The length of time that the power converter can continue to operate in the absence of line voltage is referred to as the xe2x80x9chold-upxe2x80x9d time. One known way that converters address this problem is to connect a bulk capacitor in parallel with the input power source. During normal operation, energy can be stored in the bulk capacitor to provide this hold-up time. The hold-up time depends upon the size of the bulk capacitor and the available duty cycle for the converter.
FIG. 1 shows a prior art AC-DC power converter 10 that includes a bulk capacitor for hold-up time. The power converter 10 includes an AC-to-DC boost converter 8 at the front end followed by a DC-to-DC converter 30 stage. A bridge rectifier 20 is arranged to convert an AC voltage applied at AC input terminals 14 and 16 to unregulated rectified DC pulses between terminals 15 and 13. This unregulated DC, which may be unsmoothed DC, is switched by a switch 12 through a boost inductor 24. The switch 12 is typically a MOSFET having a control signal input to its gate. The drive for the control signal input to switch 12 can be either a variable frequency or fixed frequency type, such that the input current is also sinusoidal with a minimum harmnonic distortion. Various integrated control circuits are known in the art for providing this drive (e.g., L4981, UC3854, and L6561). The boost converter 8 can operate as either a continuous current mode type or a discontinuous current mode type converter. Boost converter 8 develops a regulated DC bulk voltage across a bulk capacitor 18. The boost ratio provided by boost converter 8 is such that this DC bulk voltage is marginally higher than the highest peak of the input AC voltage. The DC bulk voltage is regulated by means of the boost converter 8. Converter 30 operates directly on this DC bulk voltage to provide the required isolation and secondary regulated voltage at DC output terminals 36 and 38.
Upon failure of the line input AC voltage, the energy stored in the bulk capacitor 18 will keep the DC to DC converter 30 in an operational state for a period of time, the hold-up time, following this interruption of input power. For converter 10, this hold-up time depends upon the size of the bulk capacitor 18 and the available duty cycle for the converter. Boost converter 8 typically has a wide regulation range due to the ability to operate at a nearly 100% duty cycle. The DC to DC converter 30 has limited operational duty cycle range and cannot operate over a very wide input voltage range. As a result, a larger bulk capacitor 18 is required to meet the hold-up time required to keep the DC output of the converter within acceptable limits.
Power converter 10 is presently commonly used and provides high performance characteristics. The supplied output voltage has line frequency ripple rejection. At low power levels, however, power converter 10 is expensive and has a high component count. Many low power applications exist which do not require fast transient response because of the nature of the load or the presence of fast post-regulators, at the outputs of converter 10. A need therefore exists for a lower cost, lower component solution for low power applications.
FIG. 2A shows a circuit diagram for a prior art AC-DC power converter 100. Power converter 100 comprises a power factor corrected flyback converter that switches directly on the rectified AC input pulses. AC input power is applied at terminals 114, 116 and is conventionally used to produce unsmoothed DC at terminals 113, 115 through the use of a conventional bridge rectifier 20. A capacitor 118 is connected in series with a diode 152 across the terminals 113, 115. Power converter 100 includes a transformer 128 having a primary winding 140, a secondary winding 142, and an auxiliary winding 144, each having a first and second end. In power converter 100, the auxiliary winding 144 provides the energy for recharging the capacitor 118 during each flyback cycle of the flyback converter 100.
Primary winding 140 is conventionally switched on and off at a predetermined frequency by a first switch 112. First switch 112 is typically a MOSFET having a control signal input at its control gate. The control signal input to switch 112 is typically a conventional pulse width modulation (PWM) or power factor correction (PFC) type drive signal (details not shown). Secondary winding 142 is connected to a rectifying and filter circuit comprising a diode 132 and a capacitor 134, to produce the rated DC output voltage at terminals 136 and 138.
The charging of capacitor 118 to a predetermined voltage is controlled by the circuit comprising auxiliary winding 144, a resistor 154 connected in series with a diode 126 between one end of auxiliary winding 144 and one terminal of capacitor 118, and a second switch 156 connected between the second end of auxiliary winding 144 and the other terminal of capacitor 118.
In operation, when switch 112 of converter 100 closes, current flows in the transformer primary 140 and energy is stored therein. When the first switch 112 is opened during the flyback period of converter 100, the polarity on the transformer 128 windings changes and rectifier diode 132 becomes forward biased. Diode 132 provides power to a load connected at DC output terminals 136, 138 and stores energy in output capacitor 134. During this flyback period when the first switch 112 is open, switch 156 is turned on and capacitor 118 is charged to a predetermined voltage determined by the turns ratio between primary winding 140 and auxiliary winding 144.
The voltage on capacitor 118 is usually selected low (around 50V or so). In normal operation, when the instantaneous voltage of the rectified AC pulse across terminals 115, 113 is higher than the voltage at which capacitor 118 is charged, diode 152 is reverse biased. Capacitor 118 will continue to hold its charge during this time. When this instantaneous voltage falls below the capacitor 118 voltage near the xe2x80x9cvalley pointxe2x80x9d of the rectified AC pulse, diode 152 becomes forward biased. As a result, capacitor 118 provides energy to transformer 128 to continue operation during this time. Capacitor 118 thus provides hold-up time during this period. Switch 156 can also be held off when the charge on capacitor 118 is being used by converter 100 in, order to reduce the peak currents in the transformer 128.
One drawback of the circuit in FIG. 2A is that capacitor 118 fails to provide the larger hold-up time required in most applications. Moreover, this also impacts the power factor since current is not drawn near the bottom of the rectified AC pulse. If capacitor 118 is to provide a large hold up time, then a huge capacitor will be needed, since the voltage charge on the capacitor 118 is very close to the voltage that exists at the bottom of the rectified pulse. As a result, there is poor energy utilization.
FIG. 2B shows a circuit diagram for another prior art flyback power converter that provides line harmonic correction. Power converter 110 comprises a fly back converter that switches directly on the rectified pulse and provides a DC output voltage with harmonic correction. The switch SW1 is driven by a typical power factor correction controller (not shown). In operation, the switching voltage at one end of the switch SW1 is rectified by D1 and charges capacitor C1 through resistor R1. Upon failure of the line input AC voltage, switch SW2 is closed and the voltage on C1 is applied at the input of the converter 110. The charge on C1 continues the operation of the converter during the missing AC input to provide the required hold up.
One of the drawbacks of the circuit in FIG. 2B is that, ignoring any spikes present due to leakage inductance of the transformer TRF1, the peak voltage at that junction of SW1 and the primary winding of transformer TRF1 is the sum of the peak input rectified voltage at the other end of the transformer primary winding, plus the reflected secondary voltage. This reflected voltage could be controlled by choosing a proper turns ratio of the transformer TRF1. The charge on the hold up capacitor C1 is therefore determined by the turns ratio of transformer TRF1 and the peak AC voltage. The type of converter shown in FIG. 2B is designed to operate over a wide input AC range, typically from 90V AC (RMS) to 265V AC (RMS). The range of the corresponding peak voltages for the sinusoidal waveform is 125V and 375V. Thus, although the reflected secondary voltage could be controlled by choosing proper turns ratio, the peak-rectified voltage varies widely. The extent of charge on C1 is thereby controlled by the input AC voltage. As a result, for converter 110, the value for capacitor C1 has to be chosen based on the lowest input voltage in order to provide the desired hold up time.
For converter 110 at the highest line input voltage of 265V AC, the voltage on capacitor C1 could be extremely high, typically higher than 500V. The converter 110 in FIG. 2B, thus has a drawback of requiring the use of a non-standard high voltage capacitor for capacitor C1 or a series combination of capacitors. Although in that case, capacitor C1 would provide a larger hold-up time, the hold-up time provided by the larger capacitance would be much more than required. A zener diode clamp could be inserted across C1 to limit the voltage, but undesirably higher power dissipation at high input AC condition could result. At a low line input voltage condition, a typical reflected voltage of 125V would charge capacitor C1 up to 250V. For converter 110, the value of capacitance required to provide the required hold up with 250V starting voltage may not be as small as expected.
Typical line dropout test requirements require that the power supply provide hold up for one missing cycle at the duty cycle of 10%. In other words, for this requirement there could be one missing cycle after each nine normal cycles. To satisfy this requirement, capacitor C1 in converter 110 must be charged back to the desired voltage during the duration of the nine normal AC cycles. Since the voltage on the transformer end of SW1 is line dependent, a fixed resistor R1 would give different charge times for capacitor C1 at different input line conditions. Thus, another drawback of power converter 110 is that, when the value of resistor R1 is chosen for the worst case low line condition, this resistor dissipates higher power for a high line condition.
A need therefore exists to provide the desired hold-up time during input power loss conditions while having better utilization of stored energy. There is also a need for a circuit that provides this function using fewer and lower cost components.
The present invention solves the problems of prior art devices by providing a power converter that efficiently provides the required hold-up time using a smaller, less costly hold-up capacitor. In the preferred embodiment, the present invention provides a flyback converter that switches directly on the input rectified AC pulses with variable pulse width/frequency such that harmonic correction is achieved. A capacitor is charged through a separate winding and is connected to the converter to provide the desired hold-up time only following an input voltage failure. The present invention is also suitable for any other type of AC to DC or DC to DC converter that operates over a wide input range and requires a hold-up time.
Consequently, the circuit and corresponding method of the present invention have the advantage of needing only lower cost components and fewer components as compared to prior art devices. Existing single conversion power factor corrected flyback converters do not provide the required hold-up time. Prior art single stage power factor correction techniques provide some hold-up time, but the variation in bulk capacitor voltage is wide depending on the input line voltage. As a result, a bigger bulk capacitor is required, which increases the cost and size of the power converter. Since the power converter of the present invention works with an inherent wide range input, a much smaller bulk capacitor is required in order to meet the hold-up requirements.
Broadly stated, the present invention provides a DC-DC converter having first and second input terminals to which an input DC voltage is coupled and two output terminals where the output DC power is provided, comprising a transformer comprising a primary winding, a secondary winding, and an auxiliary winding, each winding having a first and second end; the secondary winding coupled to the output terminals; a first switch connected in series with the primary winding across the first and second input terminals; the first switch alternately being switched on and off as a function of a control signal; a capacitor connected in series with a first diode and a second switch between the first and second input terminals; and a charging circuit for charging the capacitor to a predetermined value by the auxiliary winding; wherein the second switch is switched on when the input DC voltage is at or below a predetermined threshold such that the capacitor provides hold-up time for the converter.